SEARCH |
 | ||||
| Turbo decoder core design | ||||
| Author: | Jantira Juakvont | |||
| Call Number: | AIT Thesis no.ME-01-03 | |||
| Note: |
A thesis submitted in partial fulfillment of the requirements for the degree of Master of
Engineering, School of advanced Technologies
| |||
| Publisher: | Asian Institute of Technology | |||
| Series Statement: | Thesis ; no. ME-01-03 | |||
| Abstract: |
The usage of channel coding improves the error performance of communication
systems but the transmission of additional bit results in a reduction in bandwidth efficiency.
Turbo coding has been one of the best coding techniques because it provides the error
correction capability near Shannon's limit. C.Berrou, A.Glavieux and P.Thitimajshima
introduced turbo codes in 1993, then it is widely used in wireless communication
applications, satellite or deep space communication applications and magnetic storage
applications.
The turbo codes of 3GPP wireless communication standard is concentrated in this
thesis, because of designing the turbo decoder for decoding this specific turbo codes is
objective of the thesis. The hardware model of the turbo decoder is designed by describing
behavior and strncture of decoding algorithm in VHDL, and simulating the function of the
designed model. Since algorithm for decoding the turbo codes is complexity for
implementation in hardware and VHDL description is the design entry of hardware
implementation. Therefore Max-Log-MAP algorithm is chosen for implementation in
hardware model. The hardware model of the turbo decoder will be synthesized and
implemented on FPGA chip or ASIC depend on usage. | |||
| Year: | 2001 | |||
| Corresponding Series Added Entry: | Asian Institute of Technology. Thesis ; no. ME-01-03 | |||
| Type: | Thesis | |||
| School: | School of Advanced Technologies (SAT) | |||
| Department: | Department of Industrial Systems Engineering (DISE) | |||
| Academic Program/FoS: | Microelectronics (ME) | |||
| Chairperson(s): |
Lertsak Lekawat | |||
| Examination Committee(s): |
Rajatheva, .R M A P Chumnarn Punyasai | |||
| Scholarship Donor(s): |
National Electronics and Computer Technology
Center (NECTEC) | |||
| Degree: | Thesis (M.Eng.) - Asian Institute of Technology, 2001 | |||
| ||||